// Set Carrier Fq based on Channel Number // Registers: FREQ2 FREQ1 FREQ0 Sub SetChannelF(pChannel As Byte) ErrorNo = 0 If pChannel > 21 Then ErrorNo = InvalidChannel Else FreqVal = K868(pChannel) // Transfer to 32 bit Global variable SPIWriteByte(FREQ2,FreqVal.byte2,true) SPIWriteByte(FREQ1,FreqVal.byte1,true) SPIWriteByte(FREQ0,FreqVal.byte0,true) EndIf End Sub // // Settings: 868.000MHz, 64 byte FIFO, 30/32bit sync, 256kHz DR, GDO2 as Interrupt. Fixed packet. // CC1101 Initialise Sub CC1101INIT() StrobeResetCC1101() // Strobe a CC1101 RESET first SPIWriteByte(FSCTRL1,$0C,true) SPIWriteByte(FSCTRL0,$00,true) SetChannelF(RFChannel) // Set to 868.000MHz carrier BitRateBandWidth(4, 87) // Set MDMCFG3 and MDMCFG4 B/W and Data Rate SPIWriteByte(MDMCFG2,$13,true) // MDMCFG2 Modem configuration. 32 bit qualifier SPIWriteByte(MDMCFG1,$22,true) // MDMCFG1 Modem configuration. 4 preamble bytes SPIWriteByte(MDMCFG0,$F8,true) // MDMCFG0 Modem configuration. SPIWriteByte(CHANNR,$00,true) // CHANNR Channel number. SPIWriteByte(DEVIATN,$62,true) // DEVIATN Modem deviation setting (when FSK modulation is enabled). SPIWriteByte(FREND1,$B6,true) // FREND1 Front end RX configuration. SPIWriteByte(FREND0,$10,true) // FREND0 Front end RX configuration. SPIWriteByte(MCSM0,$18,true) // MCSM0 Main Radio Control State Machine configuration. SPIWriteByte(MCSM1,$3F,true) // MCSM1 3F Return to Rx mode after any action SPIWriteByte(FOCCFG,$1D,true) // FOCCFG Frequency Offset Compensation Configuration. SPIWriteByte(BSCFG,$1C,true) // BSCFG Bit synchronization Configuration. SPIWriteByte(AGCCTRL2,$C7,true) // AGCCTRL2 AGC control. SPIWriteByte(AGCCTRL1,$10,true) // AGCCTRL1 AGC control. SPIWriteByte(AGCCTRL0,$B0,true) // AGCCTRL0 AGC control. SPIWriteByte(FSCAL3,$EA,true) // FSCAL3 Frequency synthesizer calibration. SPIWriteByte(FSCAL2,$2A,true) // FSCAL2 Frequency synthesizer calibration. SPIWriteByte(FSCAL1,$00,true) // FSCAL1 Frequency synthesizer calibration. SPIWriteByte(FSCAL0,$1F,true) // FSCAL0 Frequency synthesizer calibration. SPIWriteByte(FSTEST,$59,true) // FSTEST Frequency synthesizer calibration. SPIWriteByte(TEST2,$88,true) // TEST2 Various test settings. SPIWriteByte(TEST1,$31,true) // TEST2 Various test settings. SPIWriteByte(TEST0,$09,true) // FSTEST Frequency synthesizer calibration. 60 bytes RX FIFO SPIWriteByte(FIFOTHR,$0F,true) // FIFOTHR RXFIFO and TXFIFO thresholds. 64 bytes RX FIFO SPIWriteByte(IOCFG2,$01,true) // IOCFG2 GDO2 output pin configuration. Used for RX buffer. SPIWriteByte(IOCFG0,$00,true) // IOCFG0D GDO0 output pin configuration. SPIWriteByte(PKTCTRL1,PKTCTRL0Val,true) // PKTCTRL1 Packet automation control. $04 is default. SPIWriteByte(PKTCTRL0,$04,true) // PKTCTRL1 Packet automation control. SPIWriteByte(ADDR,$00,true) // ADDR Device address. SPIWriteByte(PKTLEN,$40,true) // PKTLEN Packet length. (64 bytes) StrobeIDLE() End Sub I